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專案描述

Balsa is an asynchronous circuit simulation and synthesis system. Balsa is built around the Handshake Circuits methology, and it can generate gate level netlists from high-level descriptions in the Balsa language. Both dual-rail (QDI) and single-rail (bundled data) circuits can be generated.

System Requirements

System requirement is not defined
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2006-05-19 19:21 Back to release list
3.5

This release adds several changes aimed at achieving substantial
performance improvements by the introduction of new handshake
components. A number of experimental features have been made visible to
the general user, and there have been a number of minor bugfixes and
other improvements.
標籤: Major feature enhancements

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